189 search results - page 2 / 38 » An ultra-fast instruction set simulator |
ANSS
2001
IEEE
14 years 2 months ago
2001
IEEE
IACR
2011
12 years 10 months ago
2011
In this paper, we explore a general methodology for converting composite order pairingbased cryptosystems into the prime order setting. We employ the dual pairing vector space app...
ISCA
2002
IEEE
14 years 3 months ago
2002
IEEE
An instruction set architecture (ISA) suitable for future microprocessor design constraints is proposed. The ISA has hierarchical register files with a small number of accumulator...
ICCAD
2004
IEEE
14 years 7 months ago
2004
IEEE
Instruction set simulators are indispensable tools for the architectural exploration and verification of embedded systems. Different techniques have recently been proposed to spe...
CODES
1998
IEEE
14 years 3 months ago
1998
IEEE
Timing analysis for checking satisfaction of constraints is a crucial problem in real-time system design. In some current approaches, the delay of software modules is precalculate...