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» Analog circuit simulation using range arithmetics
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TIM
2010
294views Education» more  TIM 2010»
13 years 3 months ago
Standby Leakage Power Reduction Technique for Nanoscale CMOS VLSI Systems
In this paper, a novel low-power design technique is proposed to minimize the standby leakage power in nanoscale CMOS very large scale integration (VLSI) systems by generating the ...
HeungJun Jeon, Yong-Bin Kim, Minsu Choi
ISCAS
2002
IEEE
118views Hardware» more  ISCAS 2002»
14 years 1 months ago
A curvature compensation technique for bandgap voltage references using adaptive reference temperature
– A curvature compensation technique for bandgap voltage references that utilizes an adaptive reference temperature is presented. This compensation technique is intended for high...
Kee-Chee Tiew, J. Cusey, Randall L. Geiger
ASPDAC
2006
ACM
135views Hardware» more  ASPDAC 2006»
14 years 2 months ago
Robust analytical gate delay modeling for low voltage circuits
— Sakurai-Newton (SN) delay metric [1] is a widely used closed form delay metric for CMOS gates because of simplicity and reasonable accuracy. Nevertheless it can be shown that t...
Anand Ramalingam, Sreekumar V. Kodakara, Anirudh D...
GLVLSI
2005
IEEE
132views VLSI» more  GLVLSI 2005»
14 years 2 months ago
Interconnect capacitance extraction for system LCD circuits
This paper discusses interconnect capacitance extraction for system LCD circuits, where coupling capacitance is much significant since a ground plane locates far away unlike LSI ...
Yoshihiro Uchida, Sadahiro Tani, Masanori Hashimot...
UMC
2000
14 years 10 days ago
In-vitro Transcriptional Circuits
The structural similarity of neural networks and genetic regulatory networks to digital circuits, and hence to each other, was noted from the very beginning of their study [1, 2]....
Erik Winfree