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IESS
2007
Springer
92views Hardware» more  IESS 2007»
14 years 1 months ago
An Interactive Model Re-Coder for Efficient SoC Specification
To overcome the complexity in System-on-Chip (SoC) design, researchers have developed sophisticated design flows that significantly reduce the development time through automation...
Pramod Chandraiah, Rainer Dömer
ICIP
2000
IEEE
14 years 9 months ago
Performance Analysis of an H.263 Video Encoder for VIRAM
VIRAM (Vector Intelligent Random Access Memory) is a vector architecture processor with embedded memory, designed for portable multimedia processing devices. Its vector processing...
Thinh P. Q. Nguyen, Avideh Zakhor, Katherine A. Ye...
IJRR
2000
107views more  IJRR 2000»
13 years 7 months ago
Dynamics Simulation and Controller Interfacing for Legged Robots
Dynamics simulation can play a critical role in the engineering of robotic control code, and there exist a variety of strategies both for building physical models and for interact...
Jesse A. Reichler, Fred Delcomyn
CODES
2007
IEEE
13 years 11 months ago
Pointer re-coding for creating definitive MPSoC models
Today's MPSoC synthesis and exploration design flows start abstract input specification model captured in a system level design language. Usually this model is created from a...
Pramod Chandraiah, Rainer Dömer
CC
2007
Springer
14 years 1 months ago
A Declarative Framework for Analysis and Optimization
DeepWeaver-1 is a tool supporting cross-cutting program analysis and transformation components, called “weaves”. Like an aspect, a DeepWeaver weave consists of a query part, an...
Henry Falconer, Paul H. J. Kelly, David M. Ingram,...