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» Analysis of Design Process Dynamics
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CODES
2004
IEEE
14 years 2 months ago
Automatic synthesis of system on chip multiprocessor architectures for process networks
In this paper, we present an approach for automatic synthesis of System on Chip (SoC) multiprocessor architectures for applications expressed as process networks. Our approach is ...
Basant Kumar Dwivedi, Anshul Kumar, M. Balakrishna...
ICML
2007
IEEE
14 years 11 months ago
Percentile optimization in uncertain Markov decision processes with application to efficient exploration
Markov decision processes are an effective tool in modeling decision-making in uncertain dynamic environments. Since the parameters of these models are typically estimated from da...
Erick Delage, Shie Mannor
ISCAS
2006
IEEE
116views Hardware» more  ISCAS 2006»
14 years 4 months ago
Signal processing for brain-computer interface: enhance feature extraction and classification
Abstract-In this paper we present a new scheme for brain imaginary movement invovles sophisticated spatial-temporalsignal processing and classification for electroencephalogram spe...
Haihong Zhang, Cuntai Guan, Yuanqing Li
CODES
2003
IEEE
14 years 3 months ago
Design optimization of mixed time/event-triggered distributed embedded systems
Distributed embedded systems implemented with mixed, eventtriggered and time-triggered task sets, which communicate over bus protocols consisting of both static and dynamic phases...
Traian Pop, Petru Eles, Zebo Peng
ISPD
2006
ACM
108views Hardware» more  ISPD 2006»
14 years 4 months ago
Statistical clock tree routing for robustness to process variations
Advances in VLSI technology make clock skew more susceptible to process variations. Notwithstanding efficient zero skew routing algorithms, clock skew still limits post-manufactu...
Uday Padmanabhan, Janet Meiling Wang, Jiang Hu