5268 search results - page 182 / 1054 » Analysis of Design Process Dynamics |
110
click to vote
ISQED
2005
IEEE
15 years 8 months ago
2005
IEEE
Limited Switch Dynamic Logic (LSDL), a high performance logic circuit, has been modified by introducing a pseudo-nMOS style load. The resultant circuit consumes less power, primar...
107
Voted
DATE
2007
IEEE
15 years 9 months ago
2007
IEEE
This paper tackles the problem of dynamic power management (DPM) in nanoscale CMOS design technologies that are typically affected by increasing levels of process, voltage, and te...
146
Voted
RTS
2006
15 years 2 months ago
2006
Abstract The increasing complexity of heterogeneous systems-on-chip, SoC, and distributed embedded systems makes system optimization and exploration a challenging task. Ideally, a ...
122
Voted
ICASSP
2011
IEEE
14 years 6 months ago
2011
IEEE
Functional magnetic resonance imaging (fMRI) is a popular tool for studying brain activity due to its non-invasiveness. Conventionally an expected response needs to be available f...
199
click to vote
Publication
Within-die process variations arise during integrated circuit (IC) fabrication in the sub-100nm regime. These variations are of paramount concern as they deviate the performance of...