562 search results - page 60 / 113 » Analysis of Hardware Acceleration in Reconfigurable Embedded... |
IEEEPACT
2009
IEEE
14 years 2 months ago
2009
IEEE
Abstract—As programmers are asked to manage more complicated parallel machines, it is likely that they will become increasingly dependent on tools such as multi-threaded data rac...
ICCAD
2000
IEEE
14 years 6 days ago
2000
IEEE
A high accuracy system for transistor-level static timing analysis is presented. Accurate static timing verification requires that individual gate and interconnect delays be accu...
CEJCS
2011
12 years 7 months ago
2011
: Effective validation of distributed real-time and embedded (DRE) system quality-of-service (QoS) properties (e.g., event prioritization, latency, and throughput) requires testin...
DATE
2000
IEEE
14 years 6 days ago
2000
IEEE
c Abstraction for Worst-Case Analysis of Discrete Systems Felice Balarin Cadence Berkeley Laboratories Recently, a methodology for worst-case analysis of discrete systems has been...
EUROMICRO
2000
IEEE
14 years 6 days ago
2000
IEEE
We propose a design flow for low-power and low-cost, data-dominated, embedded systems which tightly integrate different technologies and architectures. We use Mathworks’ Simuli...