657 search results - page 4 / 132 » Analysis of Multithreaded Architectures for Parallel Computi... |
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
Most programs are repetitive, where similar behavior can be seen at different execution times. Algorithms have been proposed that automatically group similar portions of a program...
IEEEPACT
2009
IEEE
14 years 2 months ago
2009
IEEE
— This research demonstrates that coming support for hardware transactional memory can be leveraged to significantly reduce the cost of implementing true speculative multithread...
HPCA
2006
IEEE
14 years 7 months ago
2006
IEEE
Transactional memory (TM) provides an easy-to-use and high-performance parallel programming model for the upcoming chip-multiprocessor systems. Several researchers have proposed a...
ICS
2005
Tsinghua U.
14 years 29 days ago
2005
Tsinghua U.
Given the importance of parallel mesh generation in large-scale scientific applications and the proliferation of multilevel SMTbased architectures, it is imperative to obtain ins...
PPOPP
2010
ACM
14 years 4 months ago
2010
ACM
Loop vectorization, a key feature exploited to obtain high performance on Single Instruction Multiple Data (SIMD) vector architectures, is significantly hindered by irregular memo...