38 search results - page 5 / 8 » Analysis of Round-Robin Implementations of Processor Sharing... |
RTSS
2000
IEEE
13 years 11 months ago
2000
IEEE
The maturity of schedulabilty analysis techniquesfor fired-prioritypreemptive scheduling has enabled the consideration of timing issues at design time using a specification of the...
SAS
2007
Springer
14 years 1 months ago
2007
Springer
Abstract. Silicon chip design has passed a threshold whereby exponentially increasing transistor density (Moore’s Law) no longer translates into increased processing power for si...
ISCA
2008
IEEE
14 years 1 months ago
2008
IEEE
As the number of cores per die increases, be they processors, memory blocks, or custom accelerators, the on-chip interconnect the cores use to communicate gains importance. We beg...
ASPLOS
2010
ACM
14 years 1 months ago
2010
ACM
Instruction-grain lifeguards monitor the events of a running application at the level of individual instructions in order to identify and help mitigate application bugs and securi...
ASPLOS
2012
ACM
12 years 2 months ago
2012
ACM
Dynamic binary translation (DBT) is a powerful technique that enables fine-grained monitoring and manipulation of an existing program binary. At the user level, it has been emplo...