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» Analysis of a reconfigurable network processor
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FPL
2006
Springer
91views Hardware» more  FPL 2006»
14 years 19 days ago
Reconfigurable Systems Enabled by a Network-on-Chip
A modern SoC design comprises dozens of dedicated IP cores for specialized tasks and processors for generalpurpose tasks. Flexibility is the key feature of processors, since it is...
Leandro Möller, Ismael Grehs, Ney Calazans, F...
TECS
2008
47views more  TECS 2008»
13 years 8 months ago
Modeling and analysis of core-centric network processors
Yi-Neng Lin, Ying-Dar Lin, Yuan-Cheng Lai, Kuo-Kun...
CATA
2003
13 years 10 months ago
A Genetic Algorithm Approach to Static Task Scheduling in a Reconfigurable Hardware Environment
This paper presents a basic framework for applying static task scheduling techniques to arbitrarily-structured task systems whose targeted execution environment is comprised of fi...
Sin Ming Loo, B. Earl Wells, J. D. Winningham
TPDS
1998
118views more  TPDS 1998»
13 years 8 months ago
Optimizing Computing Costs Using Divisible Load Analysis
—A bus oriented network where there is a charge for the amount of divisible load processed on each processor is investigated. A cost optimal processor sequencing result is found ...
Jeeho Sohn, Thomas G. Robertazzi, Serge Luryi