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» Analysis of a reconfigurable network processor
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PVG
2003
IEEE
212views Visualization» more  PVG 2003»
14 years 6 days ago
SLIC: Scheduled Linear Image Compositing for Parallel Volume Rendering
Parallel volume rendering offers a feasible solution to the large data visualization problem by distributing both the data and rendering calculations among multiple computers con...
Aleksander Stompel, Kwan-Liu Ma, Eric B. Lum, Jame...
ICPP
1993
IEEE
13 years 11 months ago
Scalability Study of the KSR-1
Scalability of parallel architectures is an interesting area of current research. Shared memory parallel programming is attractive stemming from its relative ease in transitioning...
Umakishore Ramachandran, Gautam Shah, Ravi Kumar, ...
BMCBI
2010
139views more  BMCBI 2010»
13 years 7 months ago
A highly efficient multi-core algorithm for clustering extremely large datasets
Background: In recent years, the demand for computational power in computational biology has increased due to rapidly growing data sets from microarray and other high-throughput t...
Johann M. Kraus, Hans A. Kestler
MICRO
2007
IEEE
115views Hardware» more  MICRO 2007»
14 years 1 months ago
Optimizing NUCA Organizations and Wiring Alternatives for Large Caches with CACTI 6.0
A significant part of future microprocessor real estate will be dedicated to L2 or L3 caches. These on-chip caches will heavily impact processor performance, power dissipation, a...
Naveen Muralimanohar, Rajeev Balasubramonian, Norm...
SIGECOM
2005
ACM
169views ECommerce» more  SIGECOM 2005»
14 years 15 days ago
Online auctions with re-usable goods
This paper concerns the design of mechanisms for online scheduling in which agents bid for access to a re-usable resource such as processor time or wireless network access. Each a...
Mohammad Taghi Hajiaghayi, Robert D. Kleinberg, Mo...