747 search results - page 4 / 150 » Analysis of communication delay bounds for network on chips |
CSREAESA
2004
13 years 9 months ago
2004
Interconnect delays are increasingly becoming the dominant source of performance degradation in the nano-meter regime, largely because the wires do not scale as fast as the device...
GLOBECOM
2007
IEEE
13 years 11 months ago
2007
IEEE
The throughput of delay sensitive traffic in a Rayleigh fading network is studied by adopting a scaling limit approach. The case of study is that of a pair of nodes establishing a ...
TIT
2010
13 years 2 months ago
2010
Abstract--The goal of this paper is to increase our understanding of the fundamental performance limits of mobile and Delay Tolerant Networks (DTNs), where end-to-end multi-hop pat...
GLOBECOM
2008
IEEE
14 years 2 months ago
2008
IEEE
—In many wireless ad-hoc networks it is important to find a route that delivers a message to the destination within a certain deadline (delay constraint). We propose to identify...
DSD
2006
IEEE
14 years 1 months ago
2006
IEEE
— An on-chip communication network is most power efficient when it operates just below the saturation point. For any given traffic load the network can be operated in this regi...