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ISCAS
2007
IEEE
128views Hardware» more  ISCAS 2007»
15 years 10 months ago
Collaborative Routing Architecture for FPGA
— In this paper we present the Collaborative Routing Architecture (CRA), a routing architecture specially designed to achieve high efficiency in hardware and competitive delay p...
Yaling Ma, Mingjie Lin
JWSR
2008
241views more  JWSR 2008»
15 years 4 months ago
A Model-Driven Development Framework for Non-Functional Aspects in Service Oriented Architecture
: Service Oriented Architecture (SOA) is an emerging style of software architectures to reuse and integrate existing systems for designing new applications. Each application is des...
Hiroshi Wada, Junichi Suzuki, Katsuya Oba
TVLSI
2010
14 years 10 months ago
A Low-Area Multi-Link Interconnect Architecture for GALS Chip Multiprocessors
A new inter-processor communication architecture for chip multiprocessors is proposed which has a low area cost, flexible routing capability, and supports globally asynchronous loc...
Zhiyi Yu, Bevan M. Baas
HPCA
2005
IEEE
16 years 4 months ago
Scatter-Add in Data Parallel Architectures
Many important applications exhibit large amounts of data parallelism, and modern computer systems are designed to take advantage of it. While much of the computation in the multi...
Jung Ho Ahn, Mattan Erez, William J. Dally
CF
2009
ACM
15 years 10 months ago
Strategies for dynamic memory allocation in hybrid architectures
Hybrid architectures combining the strengths of generalpurpose processors with application-specific hardware accelerators can lead to a significant performance improvement. Our ...
Peter Bertels, Wim Heirman, Dirk Stroobandt