422 search results - page 28 / 85 » Application mapping for chip multiprocessors |
131
click to vote
DSN
2008
IEEE
15 years 10 months ago
2008
IEEE
In future large-scale multi-core microprocessors, hard errors and process variations will create dynamic heterogeneity, causing performance and power characteristics to differ amo...
149
click to vote
LPNMR
2009
Springer
2009
Springer
Application of ASP for Automatic Synthesis of Flexible Multiprocessor Systems from Parallel Programs
15 years 10 months ago
Configurable on chip multiprocessor systems combine advantages of task-level parallelism and the flexibility of field-programmable devices to customize architectures for paralle...
158
click to vote
ICPP
2008
IEEE
15 years 10 months ago
2008
IEEE
In this paper, we explore the use of hierarchically structured multiprocessor tasks (M-tasks) for programming multi-core cluster systems. These systems often have hierarchically s...
122
click to vote
ARC
2007
Springer
15 years 10 months ago
2007
Springer
Abstract. In this paper, we present a systematic design and implementation of reconfigurable interconnects on demand. The proposed on-chip interconnection network provides identic...
147
click to vote
DDECS
2008
IEEE
15 years 10 months ago
2008
IEEE
Abstract—In Network-on-Chip (NoC) application design, coreto-node mapping is an important but intractable optimization problem. In the paper, we use simulated annealing to tackle...