1398 search results - page 165 / 280 » Application-Specific Integrated Circuits |
GLVLSI
2007
IEEE
13 years 12 months ago
2007
IEEE
This paper describes a formal verification methodology of highnthesis (HLS) process. The abstraction level of the input to HLS is so high compared to that of the output that the v...
ASYNC
2004
IEEE
13 years 11 months ago
2004
IEEE
As integrated circuit technologies get smaller, circuit and architectural trends make transmitting data across long on-chip wires increasingly important yet increasingly expensive...
ICCAD
1991
IEEE
13 years 11 months ago
1991
IEEE
As feature sizes decrease and chip sizes increase, the area and performance of chips become dominated by the interconnect. In spite of this trend, most existing synthesis systems ...
ASPDAC
2007
ACM
13 years 9 months ago
2007
ACM
Rising interconnect delay and power consumption have motivated the investigation of alternative integrated circuit routing architectures. In particular, the X Architecture, which ...
DAC
2010
ACM
13 years 8 months ago
2010
ACM
With technology scaling down to 90nm and below, many yield-driven design and optimization methodologies have been proposed to cope with the prominent process variation and to incr...