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FPGA
2003
ACM
167views FPGA» more  FPGA 2003»
14 years 1 months ago
A scalable 2 V, 20 GHz FPGA using SiGe HBT BiCMOS technology
This paper presents a new power saving, high speed FPGA design enhancing a previous SiGe CML FPGA based on the Xilinx 6200 FPGA. The design aims at having a higher performance but...
Jong-Ru Guo, Chao You, Kuan Zhou, Bryan S. Goda, R...
KDD
2000
ACM
211views Data Mining» more  KDD 2000»
13 years 11 months ago
Mining IC test data to optimize VLSI testing
We describe an application of data mining and decision analysis to the problem of die-level functional test in integrated circuit manufacturing. Integrated circuits are fabricated...
Tony Fountain, Thomas G. Dietterich, Bill Sudyka
DAC
2005
ACM
13 years 9 months ago
Design methodology for IC manufacturability based on regular logic-bricks
Implementing logic blocks in an integrated circuit in terms of repeating or regular geometry patterns [6,7] can provide significant advantages in terms of manufacturability and de...
V. Kheterpal, V. Rovner, T. G. Hersan, D. Motiani,...
DAC
2010
ACM
13 years 5 months ago
Tradeoff analysis and optimization of power delivery networks with on-chip voltage regulation
Integrating a large number of on-chip voltage regulators holds the promise of solving many power delivery challenges through strong local load regulation and facilitates systemlev...
Zhiyu Zeng, Xiaoji Ye, Zhuo Feng, Peng Li
GLVLSI
2002
IEEE
108views VLSI» more  GLVLSI 2002»
14 years 25 days ago
Protected IP-core test generation
Design simplification is becoming necessary to respect the target time-to-market of SoCs, and this goal can be obtained by using predesigned IP-cores. However, their correct inte...
Alessandro Fin, Franco Fummi