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DAC
2007
ACM
14 years 8 months ago
Modeling and Estimation of Full-Chip Leakage Current Considering Within-Die Correlation
We present an efficient technique for finding the mean and variance of the full-chip leakage of a candidate design, while considering logic-structures and both die-to-die and with...
Khaled R. Heloue, Navid Azizi, Farid N. Najm
DAC
1999
ACM
14 years 8 months ago
Time-Mapped Harmonic Balance
Matrix-implicit Krylov-subspace methods have made it possible to efficiently compute the periodic steady-state of large circuits using either the time-domain shooting-Newton metho...
Ognen J. Nastov, Jacob White
DAC
2003
ACM
14 years 8 months ago
Seed encoding with LFSRs and cellular automata
Reseeding is used to improve fault coverage of pseudorandom testing. The seed corresponds to the initial state of the PRPG before filling the scan chain. In this paper, we present...
Ahmad A. Al-Yamani, Edward J. McCluskey
DAC
2003
ACM
14 years 8 months ago
State-based power analysis for systems-on-chip
Early power analysis for systems-on-chip (SoC) is crucial for determining the appropriate packaging and cost. This early analysis commonly relies on evaluating power formulas for ...
Reinaldo A. Bergamaschi, Yunjian Jiang
DAC
2003
ACM
14 years 8 months ago
An O(nlogn) time algorithm for optimal buffer insertion
The classic algorithm for optimal buffer insertion due to van Ginneken has time and space complexity O(n2 ), where n is the number of possible buffer positions. We present a new a...
Weiping Shi, Zhuo Li