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GECCO
2004
Springer
14 years 1 months ago
Designing Multiplicative General Parameter Filters Using Adaptive Genetic Algorithms
Multiplicative general parameter (MGP) approach to finite impulse response (FIR) filtering introduces a novel way to realize cost effective adaptive filters in compact very large s...
Jarno Martikainen, Seppo J. Ovaska
DATE
2003
IEEE
124views Hardware» more  DATE 2003»
14 years 1 months ago
Hierarchical Global Floorplacement Using Simulated Annealing and Network Flow Area Migration
– Floorplanning large designs with many hard macros and IP blocks of various sizes is becoming an increasingly important and challenging problem. This paper presents a global flo...
Wonjoon Choi, Kia Bazargan
EH
2003
IEEE
136views Hardware» more  EH 2003»
14 years 1 months ago
Experimental Results in Evolutionary Fault-Recovery for Field Programmable
This paper presents experimental results of fast intrinsic evolutionary design and evolutionary fault recovery of a 4-bit Digital to Analog Converter (DAC) using the JPL stand-alo...
Ricardo Salem Zebulum, Didier Keymeulen, Vu Duong,...
GLVLSI
2003
IEEE
132views VLSI» more  GLVLSI 2003»
14 years 1 months ago
Power-aware pipelined multiplier design based on 2-dimensional pipeline gating
Power-awareness indicates the scalability of the system energy with changing conditions and quality requirements. Multipliers are essential elements used in DSP applications and c...
Jia Di, Jiann S. Yuan
GLVLSI
2003
IEEE
177views VLSI» more  GLVLSI 2003»
14 years 1 months ago
Congestion reduction in traditional and new routing architectures
In dense integrated circuit designs, management of routing congestion is essential; an over congested design may be unroutable. Many factors influence congestion: placement, rout...
Ameya R. Agnihotri, Patrick H. Madden