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CONCURRENCY
2004
51views more  CONCURRENCY 2004»
13 years 10 months ago
Identification and authentication of integrated circuits
Blaise Gassend, Daihyun Lim, Dwaine E. Clarke, Mar...
ASPDAC
2010
ACM
191views Hardware» more  ASPDAC 2010»
13 years 8 months ago
CAD reference flow for 3D via-last integrated circuits
Chang-Tzu Lin, Ding-Ming Kwai, Yung-Fa Chou, Ting-...
JISE
2011
55views more  JISE 2011»
13 years 5 months ago
Design Planning with 3D-Via Optimization in Alternative Stacking Integrated Circuits
Chao-Hung Lu, Hung-Ming Chen, Chien-Nan Jimmy Liu
DAC
2011
ACM
12 years 10 months ago
Rethinking memory redundancy: optimal bit cell repair for maximum-information storage
SRAM design has been a major challenge for nanoscale manufacturing technology. We propose a new bit cell repair scheme for designing maximum-information memory system (MIMS). Unli...
Xin Li