259 search results - page 22 / 52 » Application-specific instruction generation for configurable... |
147
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HIPEAC
2007
Springer
15 years 8 months ago
2007
Springer
In this paper, we examine the trade-offs in performance and area due to customizing the datapath and instruction set architecture of a soft VLIW processor implemented in a high-den...
144
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DATE
2006
IEEE
15 years 10 months ago
2006
IEEE
This paper presents a new multiprocessor platform for high throughput turbo decoding. The proposed platform is based on a new configurable ASIP combined with an efficient memory a...
110
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ASPDAC
2006
ACM
15 years 10 months ago
2006
ACM
– An instruction set level reference model was developed for the development of synergistic processing unit (SPU) , which is one of the key components of the cell processor [1][2...
117
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HPCA
2004
IEEE
16 years 4 months ago
2004
IEEE
This paper proposes and evaluates hardware mechanisms for supporting prescient instruction prefetch--an approach to improving single-threaded application performance by using help...
155
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CP
2009
Springer
15 years 7 months ago
2009
Springer
Abstract. This paper considers the automatic generation of architectural tests (ATGP), a fundamental problem in processor validation. ATGPs are complex conditional constraint satis...