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CF
2007
ACM
15 years 8 months ago
Identifying potential parallelism via loop-centric profiling
The transition to multithreaded, multi-core designs places a greater responsibility on programmers and software for improving performance; thread-level parallelism (TLP) will be i...
Tipp Moseley, Daniel A. Connors, Dirk Grunwald, Ra...
CLUSTER
2007
IEEE
15 years 8 months ago
A feasibility analysis of power-awareness and energy minimization in modern interconnects for high-performance computing
High-performance computing (HPC) systems consume a significant amount of power, resulting in high operational costs, reduced reliability, and wasting of natural resources. Therefor...
Reza Zamani, Ahmad Afsahi, Ying Qian, V. Carl Hama...
CODES
2004
IEEE
15 years 8 months ago
Compiler-directed code restructuring for reducing data TLB energy
Prior work on TLB power optimization considered circuit and architectural techniques. A recent software-based technique for data TLBs has considered the possibility of storing the...
Mahmut T. Kandemir, Ismail Kadayif, Guilin Chen
DATE
2004
IEEE
126views Hardware» more  DATE 2004»
15 years 8 months ago
Low Static-Power Frequent-Value Data Caches
: Static energy dissipation in cache memories will constitute an increasingly larger portion of total microprocessor energy dissipation due to nanoscale technology characteristics ...
Chuanjun Zhang, Jun Yang 0002, Frank Vahid
CCGRID
2001
IEEE
15 years 8 months ago
Early Experiences with the EGrid Testbed
The Testbed and Applications working group of the European Grid Forum (EGrid) is actively building and experimenting with a grid infrastructure connecting several research-based s...
Gabrielle Allen, Thomas Dramlitsch, Tom Goodale, G...