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FPL
2007
Springer
146views Hardware» more  FPL 2007»
15 years 8 months ago
Efficient External Memory Interface for Multi-processor Platforms Realized on FPGA Chips
The complexity of today’s embedded applications requires modern high-performance embedded System-on-Chip (SoC) platforms to be multiprocessor architectures. Advances in FPGA tec...
Hristo Nikolov, Todor Stefanov, Ed F. Deprettere
118
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FSKD
2007
Springer
98views Fuzzy Logic» more  FSKD 2007»
15 years 8 months ago
Learning Selective Averaged One-Dependence Estimators for Probability Estimation
Naïve Bayes is a well-known effective and efficient classification algorithm, but its probability estimation performance is poor. Averaged One-Dependence Estimators, simply AODE,...
Qing Wang, Chuan-hua Zhou, Jiankui Guo
122
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IESS
2007
Springer
120views Hardware» more  IESS 2007»
15 years 8 months ago
Error Containment in the Time-Triggered System-On-a-Chip Architecture
Abstract: The time-triggered System-on-a-Chip (SoC) architecture provides a generic multicore system platform for a family of composable and dependable giga-scale SoCs. It supports...
Roman Obermaisser, Hermann Kopetz, Christian El Sa...
132
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MIDDLEWARE
2007
Springer
15 years 8 months ago
A multi-commodity flow approach to maximising utility in linked market-based grids
In this paper we consider the problem of maximising utility in linked market-driven distributed and Grid systems. In such systems, users submit jobs through brokers who can virtua...
James Broberg, Rajkumar Buyya
OOPSLA
2007
Springer
15 years 8 months ago
Using early phase termination to eliminate load imbalances at barrier synchronization points
We present a new technique, early phase termination, for eliminating idle processors in parallel computations that use barrier synchronization. This technique simply terminates ea...
Martin C. Rinard
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