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DAC
2010
ACM
14 years 1 months ago
LUT-based FPGA technology mapping for reliability
As device size shrinks to the nanometer range, FPGAs are increasingly prone to manufacturing defects. We anticipate that the ability to tolerate multiple defects will be very impo...
Jason Cong, Kirill Minkovich
PR
2008
141views more  PR 2008»
13 years 9 months ago
Robust and efficient multiclass SVM models for phrase pattern recognition
Phrase pattern recognition (phrase chunking) refers to automatic approaches for identifying predefined phrase structures in a stream of text. Support vector machines (SVMs)-based ...
Yu-Chieh Wu, Yue-Shi Lee, Jie-Chi Yang
CF
2006
ACM
14 years 28 days ago
Performance characteristics of an adaptive mesh refinement calculation on scalar and vector platforms
Adaptive mesh refinement (AMR) is a powerful technique that reduces the resources necessary to solve otherwise intractable problems in computational science. The AMR strategy solv...
Michael L. Welcome, Charles A. Rendleman, Leonid O...
DATE
2010
IEEE
157views Hardware» more  DATE 2010»
14 years 2 months ago
RMOT: Recursion in model order for task execution time estimation in a software pipeline
Abstract—This paper addresses the problem of execution time estimation for tasks in a software pipeline independent of the application structure or the underlying architecture. A...
Nabeel Iqbal, M. A. Siddique, Jörg Henkel
IEEEPACT
2007
IEEE
14 years 3 months ago
Automatic Correction of Loop Transformations
Loop nest optimization is a combinatorial problem. Due to the growing complexity of modern architectures, it involves two increasingly difficult tasks: (1) analyzing the profita...
Nicolas Vasilache, Albert Cohen, Louis-Noël P...