24 search results - page 1 / 5 » Arbitrary Error Detection in Combinational Circuits by Using... |
DFT
2008
IEEE
14 years 5 months ago
2008
IEEE
The paper presents a new technique for designing a concurrently checking combinational circuit. The technique is based on partitioning the circuit into two independent sub-circuit...
EAAI
2007
13 years 11 months ago
2007
This paper presents a swarm intelligence based approach to optimally partition combinational CMOS circuits for pseudoexhaustive testing. The partitioning algorithm ensures reducti...
ISQED
2006
IEEE
14 years 4 months ago
2006
IEEE
This paper is concerned with statically analyzing the susceptibility of arbitrary combinational circuits to single event upsets that are becoming a significant concern for reliabi...
VTS
2005
IEEE
14 years 4 months ago
2005
IEEE
An automated design procedure is described for synthesizing circuits with low power concurrent error detection. It is based on pre-synthesis selection of a parity-check code follo...
DFT
2005
IEEE
14 years 4 months ago
2005
IEEE
The present paper proposes a new method for detecting arbitrary faults in a functional circuit when the set of codewords is limited and known in advance. The method is based on im...