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DATE
2004
IEEE
13 years 11 months ago
2004
IEEE
Latency-insensitive systems were recently proposed by Carloni et al. as a correct-by-construction methodology for single-clock system-on-a-chip (SoC) design using predesigned IP b...
ICCD
2004
IEEE
14 years 4 months ago
2004
IEEE
This paper proposes a power-aware cache block allocation algorithm for the way-selective setassociative cache on embedded systems to reduce energy consumption without additional d...
WCAE
2006
ACM
14 years 1 months ago
2006
ACM
At Northeastern University we are building a number of courses upon a common embedded systems platform. The goal is to reduce the learning curve associated with new architectures ...
DAC
1998
ACM
14 years 8 months ago
1998
ACM
Memory is one of the most restricted resources in many modern embedded systems. Code compression can provide substantial savings in terms of size. In a compressed code CPU, a cach...
WSCG
2000
13 years 9 months ago
2000
To support 3D architectural modeling, geometric constraints are introduced. Explicit and implicit geometric relations between building elements can be expressed by the designer an...