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» Architectural Concepts in Programming Languages
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LCTRTS
2007
Springer
14 years 1 months ago
Addressing instruction fetch bottlenecks by using an instruction register file
The Instruction Register File (IRF) is an architectural extension for providing improved access to frequently occurring instructions. An optimizing compiler can exploit an IRF by ...
Stephen Roderick Hines, Gary S. Tyson, David B. Wh...
EGH
2004
Springer
14 years 26 days ago
Mio: fast multipass partitioning via priority-based instruction scheduling
Real-time graphics hardware continues to offer improved resources for programmable vertex and fragment shaders. However, shader programmers continue to write shaders that require ...
Andrew Riffel, Aaron E. Lefohn, Kiril Vidimce, Mar...
IFIP
2004
Springer
14 years 26 days ago
A Framework for End-to-End QoS Context Transfer in Mobile IPv6
Providing Quality-of-Service (QoS) guarantees and mobility support for Internet devices has become a hot research topic in the Next Generation Internet research, since mobile compu...
Chuda Liu, Depei Qian, Yi Liu, Kaiping Xiao
DAC
1998
ACM
13 years 11 months ago
OCCOM: Efficient Computation of Observability-Based Code Coverage Metrics for Functional Verification
—Functional simulation is still the primary workhorse for verifying the functional correctness of hardware designs. Functional verification is necessarily incomplete because it i...
Farzan Fallah, Srinivas Devadas, Kurt Keutzer
CASES
2007
ACM
13 years 9 months ago
Facilitating compiler optimizations through the dynamic mapping of alternate register structures
Aggressive compiler optimizations such as software pipelining and loop invariant code motion can significantly improve application performance, but these transformations often re...
Chris Zimmer, Stephen Roderick Hines, Prasad Kulka...