The last years have shown that there is no way to disregard the advantages provided by multiprocessor System-on-Chip (MPSoC) architectures in the embedded systems domain. Using mu...
In this paper we propose a new framework for modeling 2D shapes. A shape is first described by a sequence of local features (e.g., curvature) of the shape boundary. The resulting ...
In this paper we address the the growing issue of junction tunneling leakage (Ijunc) at the circuit level. Specifically, we develop a fast approach to analyze the state-dependent ...
- Data path connection elements, such as multiplexers, consume a significant amount of area on a VLSI chip, especially for FPGA designs. Multiplexer optimization is a difficult pro...
A motion adaptive de-interlacing algorithm and its hardware architecture are presented in this paper. It consists the directional interpolation - ELA with median processing, and 4...