60 search results - page 8 / 12 » Architectural Frameworks for MPP Systems on a Chip |
ICCAD
1999
IEEE
14 years 4 days ago
1999
IEEE
This paper addresses the problem of efficient and accurate performance analysis to drive the exploration and design of bus-based System-on-Chip (SOC) communication architectures. ...
GLVLSI
2005
IEEE
14 years 1 months ago
2005
IEEE
We have presented an optimal on-chip buffer allocation and buffer insertion methodology which uses stochastic models of the architecture. This methodology uses finite buffer s...
MICRO
2007
IEEE
14 years 2 months ago
2007
IEEE
As silicon process technology scales deeper into the nanometer regime, hardware defects are becoming more common. Such defects are bound to hinder the correct operation of future ...
RTAS
2010
IEEE
13 years 5 months ago
2010
IEEE
Abstract--Modern computing systems have adopted multicore architectures and multiprocessor systems on chip (MPSoCs) for accommodating the increasing demand on computation power. Ho...
FPGA
2007
ACM
14 years 2 months ago
2007
ACM
The application-specific multiprocessor System-on-a-Chip is a promising design alternative because of its high degree of flexibility, short development time, and potentially high ...