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DAC
2009
ACM
16 years 6 months ago
Interconnection fabric design for tracing signals in post-silicon validation
Post-silicon validation has become an essential step in the design flow of today's complex integrated circuits. One effective technique that provides real-time visibility to ...
Xiao Liu, Qiang Xu
DAC
2009
ACM
16 years 6 months ago
Non-intrusive dynamic application profiling for multitasked applications
Application profiling ? the process of monitoring an application to determine the frequency of execution within specific regions ? is an essential step within the design process f...
Karthik Shankar, Roman L. Lysecky
DAC
2008
ACM
16 years 6 months ago
Robust chip-level clock tree synthesis for SOC designs
A key problem that arises in System-on-a-Chip (SOC) designs of today is the Chip-level Clock Tree Synthesis (CCTS). CCTS is done by merging all the clock trees belonging to differ...
Anand Rajaram, David Z. Pan
DAC
2008
ACM
16 years 6 months ago
Partial order reduction for scalable testing of systemC TLM designs
A SystemC simulation kernel consists of a deterministic implementation of the scheduler, whose specification is nondeterministic. To leverage testing of a SystemC TLM design, we f...
Sudipta Kundu, Malay K. Ganai, Rajesh Gupta
DAC
2007
ACM
16 years 6 months ago
Statistical Analysis of Full-Chip Leakage Power Considering Junction Tunneling Leakage
In this paper we address the the growing issue of junction tunneling leakage (Ijunc) at the circuit level. Specifically, we develop a fast approach to analyze the state-dependent ...
Tao Li, Zhiping Yu