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ASPDAC
2007
ACM
156views Hardware» more  ASPDAC 2007»
14 years 1 months ago
Implementation of a Real Time Programmable Encoder for Low Density Parity Check Code on a Reconfigurable Instruction Cell Archit
- This paper presents a real time programmable irregular Low Density Parity Check (LDPC) Encoder as specified in the IEEE P802.16E/D7 standard. The encoder is programmable for fram...
Zahid Khan, Tughrul Arslan
USM
2000
14 years 1 months ago
Trade-offs in a Secure Jini Service Architecture
Jini is an infrastructure built on top of the mobile code facilities of the Java programming language enabling clients and services to spontaneously engage in arbitrary usage scena...
Peer Hasselmeyer, Roger Kehr, Marco Voß
ASPDAC
2008
ACM
164views Hardware» more  ASPDAC 2008»
13 years 11 months ago
The Shining embedded system design methodology based on self dynamic reconfigurable architectures
Complex design, targeting System-on-Chip based on reconfigurable architectures, still lacks a generalized methodology allowing both the automatic derivation of a complete system s...
Carlo Curino, Luca Fossati, Vincenzo Rana, Frances...
DSOM
2006
Springer
13 years 11 months ago
A WSDM-Based Architecture for Global Usage Characterization of Grid Computing Infrastructures
Current solutions to characterize grid computing usage are limited in three important aspects. First, they do not provide a global, uniform view of the use of infrastructures compr...
Glauco Antonio Ludwig, Luciano Paschoal Gaspary, G...
ASAP
2007
IEEE
118views Hardware» more  ASAP 2007»
13 years 11 months ago
Evaluation of a Tightly Coupled ASIP / Co-Processor Architecture Used in GNSS Receivers
This paper presents the enhancement of an ASIP’s floating point performance by coupling of a co-processor and adding of special instructions. Processor hardware modifications an...
Götz Kappen, S. el Bahri, O. Priebe, Tobias G...