Sciweavers

156 search results - page 3 / 32
» Architectural Support for Arithmetic in Optimal Extension Fi...
Sort
View
CIS
2006
Springer
13 years 11 months ago
A New Parallel Multiplier for Type II Optimal Normal Basis
In hardware implementation for the finite field, the use of normal basis has several advantages, especially the optimal normal basis is the most efficient to hardware implementati...
Chang Han Kim, Yongtae Kim, Sung Yeon Ji, IlWhan P...
DATE
2007
IEEE
142views Hardware» more  DATE 2007»
14 years 1 months ago
Optimizing instruction-set extensible processors under data bandwidth constraints
We present a methodology for generating optimized architectures for data bandwidth constrained extensible processors. We describe a scalable Integer Linear Programming (ILP) formu...
Kubilay Atasu, Robert G. Dimond, Oskar Mencer, Way...
ARITH
1999
IEEE
13 years 11 months ago
Montgomery Modular Exponentiation on Reconfigurable Hardware
It is widely recognized that security issues will play a crucial role in the majority of future computer and communication systems. Central tools for achieving system security are...
Thomas Blum
ASIACRYPT
2001
Springer
13 years 12 months ago
A Compact Rijndael Hardware Architecture with S-Box Optimization
Compact and high-speed hardware architectures and logic optimization methods for the AES algorithm Rijndael are described. Encryption and decryption data paths are combined and all...
Akashi Satoh, Sumio Morioka, Kohji Takano, Seiji M...
IEEEPACT
2002
IEEE
14 years 8 days ago
Compiler-Controlled Caching in Superword Register Files for Multimedia Extension Architectures
In this paper, we describe an algorithm and implementation of locality optimizations for architectures with instruction sets such as Intel’s SSE and Motorola’s AltiVec that su...
Jaewook Shin, Jacqueline Chame, Mary W. Hall