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DANCE
2002
IEEE
14 years 1 months ago
Design and Evaluation of a High Performance Dynamically Extensible Router
This paper describes the design, implementation and performance of an open, high performance, dynamically extensible router under development at Washington University in St. Louis...
Fred Kuhns, John D. DeHart, Anshul Kantawala, Ralp...
IEEEPACT
2009
IEEE
14 years 3 months ago
Quantifying the Potential of Program Analysis Peripherals
Abstract—As programmers are asked to manage more complicated parallel machines, it is likely that they will become increasingly dependent on tools such as multi-threaded data rac...
Mohit Tiwari, Shashidhar Mysore, Timothy Sherwood
ISCA
2006
IEEE
154views Hardware» more  ISCA 2006»
14 years 2 months ago
SODA: A Low-power Architecture For Software Radio
The physical layer of most wireless protocols is traditionally implemented in custom hardware to satisfy the heavy computational requirements while keeping power consumption to a ...
Yuan Lin, Hyunseok Lee, Mark Woh, Yoav Harel, Scot...
HPDC
2002
IEEE
14 years 1 months ago
Distributed Computing with Load-Managed Active Storage
One approach to high-performance processing of massive data sets is to incorporate computation into storage systems. Previous work has shown that this active storage model is effe...
Rajiv Wickremesinghe, Jeffrey S. Chase, Jeffrey Sc...
MICRO
2008
IEEE
114views Hardware» more  MICRO 2008»
14 years 3 months ago
Toward a multicore architecture for real-time ray-tracing
Significant improvement to visual quality for real-time 3D graphics requires modeling of complex illumination effects like soft-shadows, reflections, and diffuse lighting intera...
Venkatraman Govindaraju, Peter Djeu, Karthikeyan S...