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» Architectural Support for Synchronous Task Communication
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CF
2004
ACM
13 years 11 months ago
An architecture to support cooperating mobile embedded systems
There is a sustained trend to embed computer systems in all kinds of intelligent products. Increasing emphasis is given to enhance the functionality of such systems beyond the pro...
Edgar Nett, Stefan Schemmer
DATE
2008
IEEE
145views Hardware» more  DATE 2008»
14 years 1 months ago
Minimizing Virtual Channel Buffer for Routers in On-chip Communication Architectures
We present a novel methodology for design space exploration using a two-steps scheme to optimize the number of virtual channel buffers (buffers take the premier share of the route...
Mohammad Abdullah Al Faruque, Jörg Henkel
SAMOS
2007
Springer
14 years 1 months ago
Evaluating Large System-on-Chip on Multi-FPGA Platform
This paper presents a configurable base architecture tailorable for different applications. It allows simple and rapid way to evaluate and prototype large Multi-Processor System-on...
Ari Kulmala, Erno Salminen, Timo D. Hämä...
ENTCS
2008
125views more  ENTCS 2008»
13 years 7 months ago
Extending Lustre with Timeout Automata
This paper describes an extension to Lustre to support the analysis of globally asynchronous, locally synchronous (GALS) architectures. This extension consists of constructs for d...
Jimin Gao, Mike Whalen, Eric Van Wyk
ISCA
1998
IEEE
114views Hardware» more  ISCA 1998»
13 years 11 months ago
The MIT Alewife Machine: Architecture and Performance
Alewife is a multiprocessor architecture that supports up to 512 processing nodes connected over a scalable and cost-effective mesh network at a constant cost per node. The MIT Al...
Anant Agarwal, Ricardo Bianchini, David Chaiken, K...