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» Architectural Synthesis of Timed Asynchronous Systems
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CASES
2006
ACM
13 years 11 months ago
State space reconfigurability: an implementation architecture for self modifying finite automata
Many embedded systems exhibit temporally and behaviorally disjoint behavior slices. When such behaviors are captured by state machines, the current design flow will capture it as ...
Ka-Ming Keung, Akhilesh Tyagi
TVLSI
2010
13 years 2 months ago
A Low-Area Multi-Link Interconnect Architecture for GALS Chip Multiprocessors
A new inter-processor communication architecture for chip multiprocessors is proposed which has a low area cost, flexible routing capability, and supports globally asynchronous loc...
Zhiyi Yu, Bevan M. Baas
SAC
2004
ACM
14 years 27 days ago
Combining analysis and synthesis in a model of a biological cell
for ideas, and then abstract away from these ideas to produce algorithmic processes that can create problem solutions in a bottom-up manner. We have previously described a top-dow...
Ken Webb, Tony White
EUROGP
2009
Springer
105views Optimization» more  EUROGP 2009»
14 years 3 days ago
Quantum Circuit Synthesis with Adaptive Parameters Control
The contribution presented herein proposes an adaptive genetic algorithm applied to quantum logic circuit synthesis that, dynamically adjusts its control parameters. The adaptation...
Cristian Ruican, Mihai Udrescu, Lucian Prodan, Mir...
ICCD
2006
IEEE
128views Hardware» more  ICCD 2006»
14 years 4 months ago
Polaris: A System-Level Roadmap for On-Chip Interconnection Networks
Technology trends are driving parallel on-chip architectures in the form of multi-processor systems-on-a-chip (MPSoCs) and chip multi-processors (CMPs). In these systems the incre...
Vassos Soteriou, Noel Eisley, Hangsheng Wang, Bin ...