Sciweavers

268 search results - page 47 / 54
» Architectural descriptions for FPGA circuits
Sort
View
ISCA
2007
IEEE
106views Hardware» more  ISCA 2007»
14 years 1 months ago
Architectural implications of brick and mortar silicon manufacturing
We introduce a novel chip fabrication technique called “brick and mortar”, in which chips are made from small, pre-fabricated ASIC bricks and bonded in a designer-specified a...
Martha Mercaldi Kim, Mojtaba Mehrara, Mark Oskin, ...
DAC
2004
ACM
14 years 8 months ago
An approach to placement-coupled logic replication
We present a set of techniques for placement-coupled, timingdriven logic replication. Two components are at the core of the approach. First is an algorithm for optimal timingdrive...
Milos Hrkic, John Lillis, Giancarlo Beraudo
DATE
2005
IEEE
180views Hardware» more  DATE 2005»
14 years 1 months ago
A Coprocessor for Accelerating Visual Information Processing
Visual information processing will play an increasingly important role in future electronics systems. In many applications, e.g. video surveillance cameras, data throughput of mic...
Walter Stechele, L. Alvado Cárcel, Stephan ...
CDES
2006
184views Hardware» more  CDES 2006»
13 years 9 months ago
Compilation for Future Nanocomputer Architectures
Compilation has a long history of translating a programmer's human-readable code into machine instructions designed to make good use of a specific target computer. In this pa...
Thomas P. Way
EUROMICRO
2000
IEEE
13 years 12 months ago
Concurrent Control Systems: From Grafcet to VHDL
The Automated Production Systems (APS) are composed of concurrent interacting entities. Then any model should exhibit parallel and sequential behaviours. The Grafcet is now well e...
Frédéric Mallet, Daniel Gaffé...