85 search results - page 11 / 17 » Architectural support for shadow memory in multiprocessors |
LCTRTS
2004
Springer
14 years 27 days ago
2004
Springer
This paper presents Spinach, a new simulator toolset specifically designed to target programmable network interface architectures. Spinach models both system components that are ...
ICDCS
2007
IEEE
14 years 1 months ago
2007
IEEE
Record and Replay (RR) is a software based state replication solution designed to support recording and subsequent replay of the execution of unmodified applications running on mu...
ISCA
2006
IEEE
14 years 1 months ago
2006
IEEE
Transactional Memory (TM), Thread-Level Speculation (TLS), and Checkpointed multiprocessors are three popular architectural techniques based on the execution of multiple, cooperat...
ISCA
1998
IEEE
13 years 11 months ago
1998
IEEE
Commercial applications such as databases and Web servers constitute the largest and fastest-growing segment of the market for multiprocessor servers. Ongoing innovations in disk ...
ISCA
2007
IEEE
14 years 1 months ago
2007
IEEE
While Sequential Consistency (SC) is the most intuitive memory consistency model and the one most programmers likely assume, current multiprocessors do not support it. Instead, th...