113 search results - page 10 / 23 » Architectural-Level Fault Tolerant Computation in Nanoelectr... |
EUROPAR
2007
Springer
14 years 1 months ago
2007
Springer
Grid applications need to be fault tolerant, malleable, and migratable. In previous work, we have presented orphan saving, an efficient mechanism addressing these issues for divide...
DSN
2008
IEEE
14 years 1 months ago
2008
IEEE
Conventional processor fault tolerance based on time/space redundancy is robust but prohibitively expensive for commodity processors. This paper explores an unconventional approac...
ISCA
2011
IEEE
12 years 11 months ago
2011
IEEE
With technology scaling, manufacture-time and in-field permanent faults are becoming a fundamental problem. Multi-core architectures with spares can tolerate them by detecting an...
DAC
2002
ACM
14 years 8 months ago
2002
ACM
Software-based self-test (SBST) is emerging as a promising technology for enabling at-speed test of high-speed microprocessors using low-cost testers. We explore the fault diagnos...
CASES
2009
ACM
14 years 2 months ago
2009
ACM
As technology scales and the energy of computation continually approaches thermal equilibrium [1,2], parameter variations and noise levels will lead to larger error rates at vario...