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CF
2007
ACM
15 years 8 months ago
Massively parallel processing on a chip
MppSoC is a SIMD architecture composed of a grid of processors and memories connected by a X-Net neighbourhood network and a general purpose global router. MppSoC is an evolution ...
Philippe Marquet, Simon Duquennoy, Sébastie...
DAC
2002
ACM
16 years 5 months ago
Deriving a simulation input generator and a coverage metric from a formal specification
This paper presents novel uses of functional interface specifications for verifying RTL designs. We demonstrate how a simulation environment, a correctness checker, and a function...
Kanna Shimizu, David L. Dill
SMC
2010
IEEE
159views Control Systems» more  SMC 2010»
15 years 2 months ago
Mobile interaction with smart environments through linked data
This paper presents the design and architecture of an integrated environment that provides location independent and mobile access to Intelligent Domotic Environments. The envision...
Faisal Razzak, Dario Bonino, Fulvio Corno
FPGA
1998
ACM
142views FPGA» more  FPGA 1998»
15 years 8 months ago
A Hybrid Complete-Graph Partial-Crossbar Routing Architecture for Multi-FPGA Systems
Multi-FPGA systems (MFSs) are used as custom computing machines, logic emulators and rapid prototyping vehicles. A key aspect of these systems is their programmable routing archit...
Mohammed A. S. Khalid, Jonathan Rose
FPL
2007
Springer
121views Hardware» more  FPL 2007»
15 years 10 months ago
Improving Pipelined Soft Processors with Multithreading
Designers of FPGA-based systems are increasingly including soft processors—processors implemented in programmable logic—in their designs. Any combination of area, clock freque...
Martin Labrecque, J. Gregory Steffan