This paper presents a systematic high-speed VLSI implementation of the discrete wavelet transform (DWT) based on hardware-efficient parallel FIR filter structures. High-speed 2-D D...
In this paper, we propose the design methodology for communication channel templates from formal specification to RTL description. In this flow, design and verification start from...
A novel portable hardware architecture of the Elliptic Curve Method of factoring, designed and optimized for application in the relation collection step of the Number Field Sieve,...
Kris Gaj, Soonhak Kwon, Patrick Baier, Paul Kohlbr...
Today energy is an important factor in designing a multiprocessor system. The overall goal of this work is to propose a methodology for design space exploration of VLIW multiproce...
Manoj Gupta, Mayank Gupta, Neeraj Goel, M. Balaksr...
In this paper we present a full-custom VLSI design of highspeed 2-D DCT/IDCT processor based on the new class of time-recursive algorithms and architectures which has never been i...