This paper considers the rate optimal VLSI design of a recursive data flow graph (DFG). Previous research on rate optimal scheduling is not directly applicable to VLSI design. We ...
An important step in model-based embedded system design consists in mapping functional specifications and their tasks/operations onto execution architectures and their ressources...
Dumitru Potop-Butucaru, Robert de Simone, Yves Sor...
This paper discusses issues for the design of a Dexter-based cooperative hypermedia architecture and a specific system, DeVise Hypermedia (DHM), developed from this architecture. ...
Driven by increasing complexity and reliability demands, the Japanese Aerospace Exploration Agency (JAXA) in 2004 commissioned development of ELEGANT, a complete SpecC-based envir...
Andreas Gerstlauer, Junyu Peng, Dongwan Shin, Dani...
A new technique to acquire pseudo-noise (PN) sequences has been recently proposed in [1] and [2]. It is based on the paradigm of iterative Message Passing (iMP) to be run on loopy...