218 search results - page 24 / 44 » Architecture Level Power-Performance Tradeoffs for Pipelined... |
FPL
2009
Springer
14 years 1 months ago
2009
Springer
As FPGA-based systems including soft processors become increasingly common, we are motivated to better understand the architectural trade-offs and improve the efficiency of these...
CASES
2008
ACM
13 years 11 months ago
2008
ACM
Although CMOS feature size scaling has been the source of dramatic performance gains, it has lead to mounting reliability concerns due to increasing power densities and on-chip te...
DAC
2001
ACM
14 years 10 months ago
2001
ACM
: Fault-based side channel cryptanalysis is very effective against symmetric and asymmetric encryption algorithms. Although straightforward hardware and time redundancy based concu...
DAC
2005
ACM
13 years 11 months ago
2005
ACM
We propose a hierarchical mixed signal design methodology based on the principles of Platform-Based Design (PBD). The methodology is a meet-in-the-middle approach where design com...
HPCA
2005
IEEE
14 years 2 months ago
2005
IEEE
Future high-performance billion-transistor processors are likely to employ partitioned architectures to achieve high clock speeds, high parallelism, low design complexity, and low...