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DAC
2004
ACM
14 years 9 months ago
An efficient scalable and flexible data transfer architecture for multiprocessor SoC with massive distributed memory
Massive data transfer encountered in emerging multimedia embedded applications requires architecture allowing both highly distributed memory structure and multiprocessor computati...
Sang-Il Han, Amer Baghdadi, Marius Bonaciu, Soo-Ik...
DAC
2003
ACM
14 years 9 months ago
Embedded intelligent SRAM
Many embedded systems use a simple pipelined RISC processor for computation and an on-chip SRAM for data storage. We present an enhancement called Intelligent SRAM (ISRAM) that co...
Prabhat Jain, G. Edward Suh, Srinivas Devadas
IFIP
2001
Springer
14 years 12 days ago
An Evolutionary Approach for Pareto-optimal Configurations in SOC Platforms
: One of the most important problems in SOC platforms design is that of defining strategies for tuning the parameters of a parameterized system so as to obtain the Pareto-optimal s...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi
ITNG
2007
IEEE
14 years 2 months ago
On Design and Analysis of a Feasible Network-on-Chip (NoC) Architecture
In this paper, we present several enhanced network techniques which are appropriate for VLSI implementation and have reduced complexity, high throughput, and simple routing algori...
Jun Ho Bahn, Seung Eun Lee, Nader Bagherzadeh
ICCAD
2007
IEEE
164views Hardware» more  ICCAD 2007»
14 years 4 months ago
Architectural power models for SRAM and CAM structures based on hybrid analytical/empirical techniques
— The need to perform power analysis in the early stages of the design process has become critical as power has become a major design constraint. Embedded and highperformance mic...
Xiaoyao Liang, Kerem Turgay, David Brooks