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VTS
2005
IEEE
101views Hardware» more  VTS 2005»
14 years 3 months ago
On-Chip Spectrum Analyzer for Analog Built-In Self Test
This paper presents the design of an on-chip spectrum analyzer. A novel architecture is used to mitigate the problems encountered in trying to implement architectures employed in ...
Anup P. Jose, Keith A. Jenkins, Scott K. Reynolds
TC
2002
13 years 9 months ago
Finite Field Multiplier Using Redundant Representation
This article presents simple and highly regular architectures for finite field multipliers using a redundant representation. The basic idea is to embed a finite field into a cyclo...
Huapeng Wu, M. Anwarul Hasan, Ian F. Blake, Shuhon...
VLSID
2007
IEEE
142views VLSI» more  VLSID 2007»
14 years 4 months ago
Novel Architectures for High-Speed and Low-Power 3-2, 4-2 and 5-2 Compressors
The 3-2, 4-2 and 5-2 compressors are the basic components in many applications, in particular partial product summation in multipliers. In this paper novel architectures and desig...
Sreehari Veeramachaneni, Kirthi M. Krishna, Lingam...
ICSE
2003
IEEE-ACM
14 years 10 months ago
Pattern-Oriented Distributed System Architectures
ion. riented language features, such as abstract classes, inheritance, dynamic binding, and parameterized types. Middleware, such as object-oriented frameworks for host infrastruct...
Douglas C. Schmidt
TVLSI
2010
13 years 4 months ago
A Low-Area Multi-Link Interconnect Architecture for GALS Chip Multiprocessors
A new inter-processor communication architecture for chip multiprocessors is proposed which has a low area cost, flexible routing capability, and supports globally asynchronous loc...
Zhiyi Yu, Bevan M. Baas