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» Architecture and synthesis for multi-cycle communication
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ASAP
2004
IEEE
119views Hardware» more  ASAP 2004»
13 years 11 months ago
Automatic Synthesis of Customized Local Memories for Multicluster Application Accelerators
Distributed local memories, or scratchpads, have been shown to effectively reduce cost and power consumption of application-specific accelerators while maintaining performance. Th...
Manjunath Kudlur, Kevin Fan, Michael L. Chu, Scott...
CSREAESA
2004
13 years 9 months ago
An Energy-Aware Synthesis Methodology for OS-Driven Multi-Process Embedded Software
The growing software content in various battery-driven embedded systems has led to significant interest in technologies for energy-efficient embedded software. While lowenergy sof...
Tat Kee Tan, Anand Raghunathan, Niraj K. Jha
VLSID
2003
IEEE
147views VLSI» more  VLSID 2003»
14 years 8 months ago
SoC Synthesis with Automatic Hardware Software Interface Generation
Design of efficient System-on-Chips (SoCs) require thorough application analysis to identify various compute intensive parts. These compute intensive parts can be mapped to hardwa...
Amarjeet Singh 0002, Amit Chhabra, Anup Gangwar, B...
VLSID
2003
IEEE
104views VLSI» more  VLSID 2003»
14 years 27 days ago
Interfacing Cores with On-chip Packet-Switched Networks
With the emergence of the packet-switched networks as a possible system-on-chip (SoC) communication paradigm, the design of network-on-chips (NoC) has provided a challenge to the ...
Praveen Bhojwani, Rabi N. Mahapatra
DAC
2004
ACM
14 years 8 months ago
Synthesizing interconnect-efficient low density parity check codes
Error correcting codes are widely used in communication and storage applications. Codec complexity has usually been measured with a software implementation in mind. A recent hardw...
Marghoob Mohiyuddin, Amit Prakash, Adnan Aziz, Way...