72 search results - page 8 / 15 » Architecture evaluation for power-efficient FPGAs |
ASAP
2008
IEEE
14 years 2 months ago
2008
IEEE
Reconfigurable circuits now have a capacity that allows them to be used as floating-point accelerators. They offer massive parallelism, but also the opportunity to design optimi...
FPGA
2000
ACM
13 years 11 months ago
2000
ACM
With the expiration of the Data Encryption Standard (DES) in 1998, the Advanced Encryption Standard (AES) development process is well underway. It is hoped that the result of the ...
FPGA
2003
ACM
14 years 28 days ago
2003
ACM
We present a pipelining-aware router for FPGAs. The problem of routing pipelined signals is different from the conventional FPGA routing problem. For example, the two terminal N-D...
FPL
2007
Springer
14 years 1 months ago
2007
Springer
This paper introduces a software supported methodology for exploring/evaluating 3D FPGA architectures. Two new CAD tools are developed: (i) the 3DPRO for placement and routing on ...
PVLDB
2010
13 years 6 months ago
2010
Complex event detection is an advanced form of data stream processing where the stream(s) are scrutinized to identify given event patterns. The challenge for many complex event pr...