143 search results - page 11 / 29 » Architecture optimisation with Currawong |
AHS
2006
IEEE
14 years 1 months ago
2006
IEEE
Domain-specific reconfigurable arrays have shown to provide an efficient trade-off between flexibility of FPGA and performance of ASIC circuit. Nonetheless, the design of these he...
DATE
2005
IEEE
14 years 1 months ago
2005
IEEE
This paper explores methods for hardware acceleration of Hidden Markov Model (HMM) decoding for the detection of persons in still images. Our architecture exploits the inherent st...
DELTA
2010
IEEE
14 years 14 days ago
2010
IEEE
High level hardware description languages aim to make hardware design more like programming software. These languages are often used to accelerate legacy software algorithms by ...
ACSC
2005
IEEE
14 years 1 months ago
2005
IEEE
The global dynamics of automata networks (such as neural networks) are a function of their topology and the choice of automata used. Evolutionary methods can be applied to the opt...
EUROPAR
1998
Springer
13 years 11 months ago
1998
Springer
This paper illustrates the use of a post-mortem call-graph profiling tool in the analysis of an SQL query processing application written using BSPIib [4]. Unlike other parallel pro...