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ISCAS
2005
IEEE
136views Hardware» more  ISCAS 2005»
14 years 15 days ago
Architectures for ASIC implementations of low-density parity-check convolutional encoders and decoders
— Low-Density Parity-Check Convolutional Codes (LDPC-CCs) are an attractive alternative to their block-oriented counterparts, LDPC-BCs. In this paper, we introduce these codes an...
Ramkrishna Swamy, Stephen Bates, Tyler L. Brandon
ASAP
2006
IEEE
138views Hardware» more  ASAP 2006»
13 years 10 months ago
Configurable, High Throughput, Irregular LDPC Decoder Architecture: Tradeoff Analysis and Implementation
Low Density Parity Check (LDPC) codes are one of the best error correcting codes that enable the future generations of wireless devices to achieve higher data rates. This paper pr...
Marjan Karkooti, Predrag Radosavljevic, Joseph R. ...