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» Architectures for function evaluation on FPGAs
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DAC
2001
ACM
14 years 8 months ago
A True Single-Phase 8-bit Adiabatic Multiplier
This paper presents the design and evaluation of an 8-bit adiabatic multiplier. Both the multiplier core and its built-in self-test logic have been designed using a true single-ph...
Suhwan Kim, Conrad H. Ziesler, Marios C. Papaefthy...
VLSID
2004
IEEE
125views VLSI» more  VLSID 2004»
14 years 8 months ago
Energy-Optimizing Source Code Transformations for OS-driven Embedded Software
The increasing software content of battery-powered embedded systems has fueled much interest in techniques for developing energyefficient embedded software. Source code transforma...
Yunsi Fei, Srivaths Ravi, Anand Raghunathan, Niraj...
EDBT
2008
ACM
147views Database» more  EDBT 2008»
14 years 7 months ago
iDataGuard: middleware providing a secure network drive interface to untrusted internet data storage
In this demonstration, we present the design and features of iDataGuard. iDataGuard is an interoperable security middleware that allows users to outsource their file systems to he...
Ravi Chandra Jammalamadaka, Roberto Gamboni, Shara...
CGO
2010
IEEE
14 years 2 months ago
Automatic creation of tile size selection models
Tiling is a widely used loop transformation for exposing/exploiting parallelism and data locality. Effective use of tiling requires selection and tuning of the tile sizes. This is...
Tomofumi Yuki, Lakshminarayanan Renganarayanan, Sa...
WCRE
2009
IEEE
14 years 2 months ago
A Study of the Time Dependence of Code Changes
—Much of modern software development consists of building on older changes. Older periods provide the structure (e.g., functions and data types) on which changes in future period...
Omar Alam, Bram Adams, Ahmed E. Hassan