643 search results - page 29 / 129 » Architectures for function evaluation on FPGAs |
FPL
2008
Springer
13 years 11 months ago
2008
Springer
Abstract-The network on chip will become a future general purpose interconnect for FPGAs much like today's standard OPB or PLB bus architectures. However, performance characte...
ARC
2010
Springer
14 years 4 months ago
2010
Springer
Physical Unclonable Functions promise cheap, efficient, and secure identification and authentication of devices. In FPGA devices, PUFs may be instantiated directly from FPGA fabri...
HPCA
2002
IEEE
14 years 10 months ago
2002
IEEE
Cyclops is a new architecture for high performance parallel computers being developed at the IBM T. J. Watson Research Center. The basic cell of this architecture is a single-chip...
DATE
2005
IEEE
14 years 3 months ago
2005
IEEE
With new sophisticated compiler technology, it is possible to schedule distant instructions efficiently. As a consequence, the amount of exploitable instruction level parallelism...
ISCAPDCS
2007
13 years 11 months ago
2007
— Next generation multimedia mobile phones that use the high bandwidth 3G cellular radio network consume more power. Multimedia algorithms such as speech, video transcodecs have ...