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ARC
2007
Springer
102views Hardware» more  ARC 2007»
15 years 9 months ago
Reconfigurable Hardware Acceleration of Canonical Graph Labelling
Many important algorithms in computational biology and related subjects rely on the ability to extract and to identify sub-graphs of larger graphs; an example is to find common fun...
David B. Thomas, Wayne Luk, Michael Stumpf
CSREASAM
2006
15 years 7 months ago
Finding Minimum Optimal Path Securely Using Homomorphic Encryption Schemes in Computer Networks
- In this paper we find a secure routing protocol for computer networks, which finds minimum optimum path using homomorphic encryption schemes. We briefly look into the existing ho...
Levent Ertaul, Vaidehi Kedlaya
ASPDAC
2010
ACM
151views Hardware» more  ASPDAC 2010»
15 years 3 months ago
Source-level timing annotation for fast and accurate TLM computation model generation
This paper proposes a source-level timing annotation method for generation of accurate transaction level models for software computation modules. While Transaction Level Modeling ...
Kai-Li Lin, Chen Kang Lo, Ren-Song Tsay
ACMMSP
2006
ACM
232views Hardware» more  ACMMSP 2006»
15 years 11 months ago
Implicit and explicit optimizations for stencil computations
Stencil-based kernels constitute the core of many scientific applications on block-structured grids. Unfortunately, these codes achieve a low fraction of peak performance, due pr...
Shoaib Kamil, Kaushik Datta, Samuel Williams, Leon...
DAC
2001
ACM
16 years 6 months ago
An Interconnect Energy Model Considering Coupling Effects
This paper first presents an analytical interconnect energy model with consideration of event coupling, which is not considered by the conventional 1 2CV2 model. Our energy calcul...
Taku Uchino, Jason Cong