125 search results - page 9 / 25 » Area and delay trade-offs in the circuit and architecture de... |
FPGA
2003
ACM
14 years 17 days ago
2003
ACM
We present a pipelining-aware router for FPGAs. The problem of routing pipelined signals is different from the conventional FPGA routing problem. For example, the two terminal N-D...
FPGA
2008
ACM
13 years 9 months ago
2008
ACM
A design tool for routing channel segmentation in islandstyle FPGAs is presented. Given the FPGA architecture parameters and a set of benchmark designs, the tool optimizes routing...
GLVLSI
2006
IEEE
14 years 1 months ago
2006
IEEE
This paper presents a minimum area, low-power driven clustering algorithm for coarse-grained, antifuse-based FPGAs under delay constraints. The algorithm accurately predicts logic...
CF
2004
ACM
14 years 24 days ago
2004
ACM
This paper discusses fault-tolerant techniques for SRAM-based FPGAs. These techniques can be based on circuit level modifications, with obvious modifications in the programmable a...
FPGA
2011
ACM
12 years 10 months ago
2011
ACM
As soft processors are increasingly used in diverse applications, there is a need to evolve their microarchitectures in a way that suits the FPGA implementation substrate. This pa...